SIMD#
MMX#
MMX Vs SSE
MMX is not a generally-useful instruction set any more. SSE instructions are better in almost every regard. However, MMX is both simpler and has a smaller instruction set thereby providing an easier way to get started with SIMD instructions before moving on to SSE and AVX where the same principles apply.
MMX (unofficially either MultiMedia eXtensions or Matrix Maths eXtensions) was the first SIMD extension set introduced by Intel in 1997. MMX is integer-only and offers instructions that use the same register space as the FPU and can operate on:
- 1 64-bit value
- 2 32-bit values
- 4 16-bit values
- 8 8-bit values
8 64-bit, general-purpose registers (MM0 - MM7) are available and, because it uses the FPU’s register space, floating-point operations should not be used simultaneously. The upper 16 bits of the 80-bit FPU registers are unused by MMX instructions and are set to all ones which prevents easily mixing them with floating-point instructions.
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config:
packet:
rowHeight: 32
bitWidth: 8
bitsPerRow: 64
---
packet
title 1 Quadword Value
+64: ""---
config:
packet:
rowHeight: 32
bitWidth: 8
bitsPerRow: 64
---
packet
title 2 Doubleword Values
+32: ""
+32: ""---
config:
packet:
rowHeight: 32
bitWidth: 8
bitsPerRow: 64
---
packet
title 4 Word Values
+16: ""
+16: ""
+16: ""
+16: ""---
config:
packet:
rowHeight: 32
bitWidth: 8
bitsPerRow: 64
---
packet
title 8 Byte Values
+8: ""
+8: ""
+8: ""
+8: ""
+8: ""
+8: ""
+8: ""
+8: ""MMX mode is entered by executing an MMX instruction and floating-point code mixed with MMX code may have unexpected
behaviour. To exit MMX mode, the emms instruction is used to restore the FPU.
Instructions#
All of the instructions are prefixed with p, except: emms, movd and movq.
Packing#
Unpacking#
Unpacking
; mm1 = [A7, A6, A5, A4, A3, A2, A1, A0]
; mm2 = [B7, B6, B5, B4, B3, B2, B1, B0]
punpckhbw mm1, mm2
; mm1 = [A7, B7, A6, B6, A5, B5, A4, B4]
Comparisons result in all ones for true and all zeroes for false.